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Adjacent technologyPeer reviewedDAC 2026 paper

Catalog record / 28 Apr 2026

NVLLM moves feed-forward computation into stacked NAND

NVLLM wafer-stacks 3D NAND with CMOS compute, ECC, and buffering so feed-forward operations can execute on raw NAND reads while attention remains on CMOS and DRAM.

Why it matters

It is a peer-reviewed NAND-centric alternative that exposes a different answer to HBF's data-movement problem: compute inside the flash stack rather than stream all weights to the accelerator.

Exact source title

NVLLM: A 3D NAND-Centric Architecture Enabling Edge on-Device LLM Inference

Authors

Mingbo Hao, Changwei Yan, Haoyu Cui, Zhihao Yan, Yizhi Ding, Zhangrui Qian, Weiwei Shan

Tags

NVLLMin-flash computing3D NANDedge inferenceDAC 2026

Reading rule

This record preserves the source's maturity label. A roadmap, research result, or announced specification should not be treated as independent evidence of shipping hardware.